The present invention relates to a method for using a memory device, and more particularly, to embodiments of a method for sensing the resistance state of a memory cell that includes a memory element coupled to a selector element in series.
Spin transfer torque magnetic random access memory (STT-MRAM) is a new class of non-volatile memory, which can retain the stored information when powered off. An STT-MRAM device normally comprises an array of memory cells, each of which includes a magnetic memory element and a selection transistor coupled in series between appropriate electrodes. Upon application of a switching current through the magnetic memory element, the electrical resistance of the magnetic memory element would change accordingly, thereby switching the stored logic in the respective memory cell.
FIG. 1 is a schematic circuit diagram of an STT-MRAM device 30, which comprises a plurality of memory cells 32 with each of the memory cells 32 including a selection transistor 34 coupled to a magnetic memory element 36; a plurality of parallel word lines 38 with each being coupled to the gates of a respective row of the selection transistors 34 in a first direction; and a plurality of parallel bit lines 40 with each being coupled to a respective row of the memory elements 36 in a second direction substantially perpendicular to the first direction; and a plurality of parallel source lines 42 with each being coupled to a respective row of the selection transistors 34 in the first or second direction.
The magnetic memory element 36 normally includes a magnetic reference layer and a magnetic free layer with an electron tunnel junction layer interposed therebetween. The magnetic reference layer, the electron tunnel junction layer, and the magnetic free layer collectively form a magnetic tunneling junction (MTJ). Upon the application of an appropriate current through the MTJ, the magnetization direction of the magnetic free layer can be switched between two directions: parallel and anti-parallel with respect to the magnetization direction of the magnetic reference layer. The electron tunnel junction layer is normally made of an insulating material with a thickness ranging from a few to a few tens of angstroms. When the magnetization directions of the magnetic free and reference layers are substantially parallel or oriented in a same direction, electrons polarized by the magnetic reference layer can tunnel through the insulating tunnel junction layer, thereby decreasing the electrical resistance of the MTJ. Conversely, the electrical resistance of the MTJ is high when the magnetization directions of the magnetic reference and free layers are substantially anti-parallel or oriented in opposite directions. The stored logic in the magnetic memory element can be switched by changing the magnetization direction of the magnetic free layer between parallel and anti-parallel with respect to the magnetization direction of the reference layer. Therefore, the MTJ has two stable resistance states that allow the MTJ to serve as a non-volatile memory element.
STT-MRAM devices have almost unlimited read/write endurance but relatively smaller sensing margin compared with other types of resistance-based memory devices, such as phase change random access memory (PCRAM) and resistive random access memory (ReRAM). The resistance ratio of high-to-low resistance state of STT-MRAM is about 2-3, compared with 102-105 for PCRAM and ReRAM. Therefore, there is a need for an STT-MRAM device that has an improved resistance ratio to increase the sensing margin and that can be inexpensively manufactured.